IEEE

Hardware Implementation of Systolic Array Architecture using 4:2 Compressor Approximate Multiplier for Image Processing Operations

Abstract: This research presents an innovative FPGA implementation of a $128 \times 128$ convolution systolic array architecture, optimized for image processing applications. The core of this design ...
IEEE

A Framework to Develop and Implement Role-Play Case Studies to Teach Responsible Technology Use

Abstract: Case studies are among the most popular and effective pedagogical techniques in ethics education. In this paper, we present a framework to develop and effectively use one type of case study: ...
GitHub

The PyTorch implementation of Generative Pre-trained Transformers (GPTs) using Kolmogorov-Arnold Networks (KANs) for language modeling

@misc{GANESH2024KANGPT, author = {Aditya Nalgunda Ganesh}, title = {KAN-GPT: The PyTorch implementation of Generative Pre-trained Transformers (GPTs) using Kolmogorov ...